[1]徐文进,田泽,郑新建,等. 1394总线物理层芯片虚拟验证关键技术研究[J].计算机技术与发展,2016,26(05):162-164.
　XU Wen-jin,TIAN Ze,ZHENG Xin-jian,et al. Research on Key Technology of 1394 Bus PHY Chip Virtual Verification[J].,2016,26(05):162-164.
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 1394总线物理层芯片虚拟验证关键技术研究()
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《计算机技术与发展》[ISSN:1006-6977/CN:61-1281/TN]

卷:
26
期数:
2016年05期
页码:
162-164
栏目:
应用开发研究
出版日期:
2016-05-10

文章信息/Info

Title:
 Research on Key Technology of 1394 Bus PHY Chip Virtual Verification
文章编号:
1673-629X（2016)05-0162-03
作者:
 徐文进; 田泽; 郑新建; 楼晓强
 中航工业西安航空计算技术研究所;集成电路与微系统设计航空科技重点实验室
Author(s):
 XU Wen-jin; TIAN Ze; ZHENG Xin-jian; LOU Xiao-qiang
关键词:
 ; 1394; PHY; 验证平台; 验证模型
Keywords:
 ; 1394; PHY; verification platform; verifying model
分类号:
TP39
文献标志码:
A
摘要:
 1394总线支持等时和异步流传输事务,具有确定性带宽、实时数据传输、拓扑灵活等特点,满足航空电子系统对总线带宽、实时性、容错和可靠性等方面的要求.物理层芯片是1394总线网络的核心器件,在研制过程中能否对其进行充分验证,是直接影响其投片成功的关键因素之一.文中通过对1394总线物理层芯片进行功能分析,描述了芯片的验证策略,提出了一种虚拟验证平台搭建的关键技术.该验证平台具有高效率、灵活等特点.通过对数字逻辑的验证实施,可以极大地缩短验证时间,提高验证效率,节省验证人力,并对后续1394总线相关产品的开发具有一定参考价值.
Abstract:
 1394 bus supports isochronous and asynchronous transaction of flow transmission,which has the characteristics of certain band-width,real-time data transmission and flexible topology,meeting the requirements of avionics system to bus bandwidth,real-time,fault tolerance and reliability. Physical layer chip is the core device of the IEEE1394 buses. In the whole development process of the chip,the ability to fully verify its direct impact on the final tape-out is crucial. In this paper,the function of the 1394 bus physical layer chip is ana-lyzed,and the verification strategy is described,and a kind of key technologies of virtual verification platform is put forward. This verifi-cation platform has high efficiency,flexibility and so on. Through the implementation of digital logic,it can shorten the time of verifica-tion,improve the efficiency of verification,save the human resources,and have a certain reference value for the development of the 1394 bus related products.

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更新日期/Last Update: 2016-09-19