[1]王晋,田泽,张文博. 一种CMOS1/2Mbps3.3V1553B收发器的设计与实现[J].计算机技术与发展,2014,24(11):250-253.
　WANG Jin,TIAN Ze,ZHANG Wen-bo. Design and Implementation of a CMOS 1/2 Mbps 3 . 3 V 1553 B Transceiver[J].,2014,24(11):250-253.
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 一种CMOS1/2Mbps3.3V1553B收发器的设计与实现()
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《计算机技术与发展》[ISSN:1006-6977/CN:61-1281/TN]

卷:
24
期数:
2014年11期
页码:
250-253
栏目:
应用开发研究
出版日期:
2014-11-10

文章信息/Info

Title:
 Design and Implementation of a CMOS 1/2 Mbps 3 . 3 V 1553 B Transceiver
文章编号:
1673-629X（2014）11-0250-04
作者:
王晋; 田泽; 张文博
 中国航空计算技术研究所
Author(s):
 WANG Jin; TIAN Ze ; ZHANG Wen-bo
关键词:
 ; CMOS; 1553B; 收发器
Keywords:
 ; CMOS; 1553B;  transceiver
分类号:
TP39
文献标志码:
A
摘要:
 1553B总线是一种广泛用于航天、航空以及军事领域内的通用数字总线。但随着应用系统的技术发展，原有1 Mb-ps传输速率的收发器已经不能满足使用需求，因此文中提出一种2 Mbps的收发器系统结构，并兼容1 Mbps的传输速率。该收发器采用0.35μm single-poly CMOS工艺实现，流片测试结果表明，在1 Mbps速率下，该收发器完全满足1553B总线协议要求。在2 Mbps速率下，收发器的传输误码率小于10-12。在3.3 V工作电压下，收发器静态功耗为17 mA。
Abstract:
 1553B bus is a general-purpose digital bus,which is widely used in aerospace,aviation and military fields. But with the techno-logical development of application systems,the original transmission rate of 1 Mbps transceiver cannot meet the applied demand. There-fore,propose a 2 Mbps transceiver system architecture,and is compatible for transfer rate of 1 Mbps. This transceiver fabricates in a 0. 35μm single-poly CMOS technology process. Test results of the transceiver show that,at a data rate of 1 Mbps,the transceiver meets the re-quirement of 1553B bus protocol,and at a data rate of 2 Mbps,a Bit Error Rate (BER) of better than<10-12 is used a criterion. The stat-ic power consumption of the transceiver is 17 mA from a supply voltage of 3. 3 V.

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更新日期/Last Update: 2015-04-14