[1]王玉欢,田泽,杨海波,等. 一种VESA转RapidIO接口的设计与实现[J].计算机技术与发展,2014,24(10):115-118.
　WANG Yu-huan,TIAN Ze,YANG Hai-bo,et al. Design and Implementation of a VESA/RapidIO Interface[J].,2014,24(10):115-118.
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 一种VESA转RapidIO接口的设计与实现()
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《计算机技术与发展》[ISSN:1006-6977/CN:61-1281/TN]

卷:
24
期数:
2014年10期
页码:
115-118
栏目:
智能、算法、系统工程
出版日期:
2014-10-10

文章信息/Info

Title:
 Design and Implementation of a VESA/RapidIO Interface
文章编号:
1673-629X（2014）10-0115-04
作者:
 王玉欢; 田泽; 杨海波; 李攀; 许政
 中国航空计算技术研究所
Author(s):
 WANG Yu-huan; TIAN Ze; YANG Hai-bo; LI Pan ; XU Zheng
关键词:
 ; 视频电子标准协会; RapidIO; 转接桥; DPRAM
Keywords:
 ; VESA; RapidIO; bridge; DPRAM
分类号:
TP39
文献标志码:
A
摘要:
 在现代通信技术中,为了提高VESA视频数据的传输和处理速率,VESA视频数据通常要通过高速串行总线Ra-pidIO传输到主机或DSP中。因此,传输时必须在VESA接口和RapidIO接口之间添加时序转换电路。为了解决传统方法中通过时序转换电路直接进行时序转换所带来的设计复杂、可移植性差等问题,文中基于应用需求,提出一种用DPRAM将VESA接口与RapidIO的DMA接口隔离的架构,设计并实现了一种VESA到RapidIO接口的转接桥,以满足二者之间的通信需求。功能仿真和工程实践表明,该转接桥工作稳定,性能良好,较好地满足了应用需求。
Abstract:
 In the modern communication technology,the video data is usually transmitted to hosts or DSPs through high-speed serial bus RapidIO for improving its transmitting and processing speed. Therefore,a conversion circuit of timing must be added between VESA in-terface and RapidIO interface. To make up for the deficiencies,such as complex design and poor transportability,as a result of changing the timing directly in the traditional way,offer an architecture segregating the VESA interface and RapidIO interface with the DPRAM in this paper,design and implement a VESA to RapidIO bridge in order to satisfy the demands of the communication between them. The functional simulation and engineering practice shows that it works well and has good performance,meeting the application requirement better.

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更新日期/Last Update: 2015-04-02