[1]李宗凌,汪路元,禹霁阳,等.基于多并行计算和存储的 CNN 加速器[J].计算机技术与发展,2019,29(07):11-16.[doi:10. 3969 / j. issn. 1673-629X. 2019. 07. 003]
　LI Zong-ling,WANG Lu-yuan,YU Ji-yang,et al.CNN Accelerator Based on Multi-parallel Computing and Storage[J].,2019,29(07):11-16.[doi:10. 3969 / j. issn. 1673-629X. 2019. 07. 003]
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基于多并行计算和存储的 CNN 加速器()
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《计算机技术与发展》[ISSN:1006-6977/CN:61-1281/TN]

卷:
29
期数:
2019年07期
页码:
11-16
栏目:
智能、算法、系统工程
出版日期:
2019-07-10

文章信息/Info

Title:
CNN Accelerator Based on Multi-parallel Computing and Storage
文章编号:
1673-629X(2019)07-0011-06
作者:
李宗凌1 ; 汪路元1 ; 禹霁阳1 ; 程博文1 ; 郝 梁1 ; 张伟功2
1. 北京空间飞行器总体设计部,北京 100094; 2. 首都师范大学 信息工程学院,北京 100048
Author(s):
LI Zong-ling 1 ; WANG Lu-yuan 1 ; YU Ji-yang 1 ; CHENG Bo-wen 1 ; HAO Liang 1 ;  ZHANG Wei-gong 2
1. Institute of Spacecraft System Engineering,Beijing 100094,China;2. School of Information Engineering,Capital Normal University,Beijing 100048,China
关键词:
卷积神经网络; 并行计算和存储; 加速器; VGG-16 模型; 现场可编程逻辑器件
Keywords:
convolution neural network; parallel computing and storage; accelerator; VGG-16 model; FPGA
分类号:
TP39
DOI:
10. 3969 / j. issn. 1673-629X. 2019. 07. 003
摘要:
根据深度卷积神经网络(CNN)前向推理结构特点,设计了基于多并行计算和存储的深度卷积神经网络加速器,从运算效率与数据重用两个角度分析了卷积运算的并行特征,并研究了全连接层的全并行流水实现方式。 该加速器采用并行流水结构提升计算效率,在卷积层运算中,充分利用多种卷积运算并行架构平衡运算效率与参数及数据载入带宽的需求,通过三种加速方式实现卷积层内全流水加速;在全连接层运算中,将乘累加运算设计成全流水处理架构,流水延时不超过 20 个处理时钟,并通过并行计算实现 16 倍加速。在基于ImageNet公开数据集验证实验中,该加速器每周期最多运行 2 304 次乘累加运算,在 150MHz 的工作频率下,峰值运算速率达到 691.2 Gops,能效比为 i7-6700-CPU 的2 700 倍以上,为 GTX-1050-GPU 的 290 倍以上。 该加速器在硬件资源、计算精度、速度以及功耗等多方面达到良好平衡,便于在星载嵌入式环境应用。
Abstract:
According to the forward reasoning structure of the deep convolution neural network (CNN),a deep convolution neural network accelerator based on multi-parallel computation and storage is proposed and the parallel features of convolution operation are analyzed from two angles of operational efficiency and data reuse. The accelerator uses a parallel pipelining structure to improve operation efficiency,making full use of a variety of convolution computing parallel architectures to balance the operational efficiency and the demand for bandwidth of parameters and data,accelerating the whole flow in convolution layer by three level acceleration mode. In the full-connection layer operation,the multiplication and accumulation operation is designed as the full-pipeline processing operation. The pipeline delay does not exceed 20 processing clocks,and 16 times acceleration is realized by parallel computing. In the verification test based on ImageNet datasets,the accelerator runs 2 304 times per cycle by cumulative operation. At the working frequency of 150 MHz, the peak operation rate can reach 691.2 Gops,the energy efficiency ratio is more than 2 700 times that of i7-6700-CPU,which is more than 290 times of GTX-1050-GPU. The accelerator achieves a well balance in hardware resources,computing accuracy,speed and power consumption,and is easy to be used in spaceborne embedded environment.

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更新日期/Last Update: 2019-07-10