[1]吕俊盛,田泽,邵刚. 一种0.4-4 GHz大范围高精度占空比调整电路[J].计算机技术与发展,2015,25(06):84-86.
 Lü Jun-sheng,TIAN Ze,SHAO Gang. A 0 . 4-4 GHz Large Range High Precision Duty-cycle Correction Circuit[J].,2015,25(06):84-86.
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 一种0.4-4 GHz大范围高精度占空比调整电路()
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《计算机技术与发展》[ISSN:1006-6977/CN:61-1281/TN]

卷:
25
期数:
2015年06期
页码:
84-86
栏目:
智能、算法、系统工程
出版日期:
2015-06-10

文章信息/Info

Title:
 A 0 . 4-4 GHz Large Range High Precision Duty-cycle Correction Circuit
文章编号:
1673-629X(2015)06-0084-03
作者:
 吕俊盛田泽邵刚
 中航工业西安航空计算技术研究所
Author(s):
 Lü Jun-sheng;TIAN Ze ;SHAO Gang
关键词:
 占空比调整大范围 高精度高速
Keywords:
 duty cycle correctionlarge rangehigh precisionhigh speed
分类号:
TP31
文献标志码:
A
摘要:
 文中提出一种适用于高速电路系统的大范围、高精度占空比调整电路。该电路能够自动调整输入时钟的占空比,使其达到50%左右的理想值。基于对占空比畸变原理的分析,文中提出的占空比调整电路采用模拟负反馈的方法,能够在0.4-4 GHz频率范围内实现20%-80%的大范围占空比调整,调整误差小于0.42%。电路采用65 nm CMOS工艺设计实现,面积仅为30μm×95μm,功耗仅1.42 mW。相较其他类型电路,该电路结构简单、性能优异、功耗低、面积小、易于集成,能够广泛应用于对占空比要求苛刻的电路系统中。
Abstract:
 A large range high precision Duty Cycle Correction ( DCC) circuit for high speed circuit system is presented. The circuit can automatically adjust the clock duty cycle to the ideal value about 50%. Based on a comprehensive analysis of the principle of the Duty Cycle Distortion (DCD),adopt an analog feedback method to achieve 20%-80% large range duty cycle correction from 0. 4 to 4 GHz, while the error is less than 0. 42%. The circuit is designed in 65 nm CMOS technology,which occupies only 30 μm×95 μm and con-sumes 1. 42 mA. The circuit has the advantages of simple architecture,excellent performance,low power,small area,and easy to in-tegrate,which can be widely applied into the circuit system with DCC requirements.

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更新日期/Last Update: 2015-07-27