[1]魏美荣,田泽,王宣明,等.一种1394总线监控器数据包处理关键技术研究[J].计算机技术与发展,2014,24(04):6-11.
 WEI Mei-rong,TIAN Ze,WANG Xuan-ming,et al.Research on Key Technologies of Packet Processing for a 1394 Bus Monitor[J].,2014,24(04):6-11.
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一种1394总线监控器数据包处理关键技术研究()
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《计算机技术与发展》[ISSN:1006-6977/CN:61-1281/TN]

卷:
24
期数:
2014年04期
页码:
6-11
栏目:
智能、算法、系统工程
出版日期:
2014-04-30

文章信息/Info

Title:
Research on Key Technologies of Packet Processing for a 1394 Bus Monitor
文章编号:
1673-629X(2014)04-0006-06
作者:
魏美荣田泽王宣明徐文进
中国航空计算技术研究所
Author(s):
WEI Mei-rongTIAN ZeWANG Xuan-mingXU Wen-jin
关键词:
1394总线监控器数据处理
Keywords:
1394 busmonitordata processing
分类号:
TP39
文献标志码:
A
摘要:
1394总线数据通信过程中需要对关键数据包进行实时监控。在不同的传输速率模式下,IEEE1394协议限定了数据包的最大传输长度。如何对总线上出现的超长数据包进行有效监控,成为监控器研制的一个关键问题。文中从1394总线监控需求出发,对超长数据包监控数据处理关键技术进行重点研究,提出一种1394总线监控器的数据包处理方案,给出了该方案的硬件系统结构、功能组成,并对关键模块的设计进行详细的介绍。经过FPGA系统测试,该设计可对总线上的数据包进行有效监听、诊断和错误处理,保证了总线上通信数据的准确性和完整性。
Abstract:
In the process of the 1394 bus data communication needs real-time monitoring of key data packets. Under the mode of different transmission rate,the maximum length of transmission for packets is limited by IEEE1394 protocol. How to effectively monitor the bus on the super long packet becomes a key issue of monitor development. Based on 1394 bus monitoring requirements,focus on the key tech-niques for super long packet monitoring data processing,give a packet processing scheme for a 1394 bus monitor,introduce the hardware system structure,function composition,and describe the design of the key modules in detail. Through the FPGA system test,the design can be effective monitoring,diagnosis and error handing for the packets on the bus,ensuring the accuracy and integrity of the communica-tion data on the bus.

相似文献/References:

[1]郑斐,田泽,马宁,等.1394与RS422总线桥的设计与实现[J].计算机技术与发展,2013,(07):253.
 ZHENG Fei,TIAN Ze,MA Ning,et al.Design and Implementation of 1394 and RS422 Bus[J].,2013,(04):253.
[2]周建勇[],于杰[],刘海阳[],等. Petri网并发进程的死锁避免策略[J].计算机技术与发展,2016,26(11):5.
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更新日期/Last Update: 1900-01-01