基于FPGA的I2 C控制器的实现-《计算机技术与发展》

文章信息/Info

摘要:: 文中旨在研究具有接口线少、控制方式简单、器件封装形式小、通信速率较高等优点的 I2 C 总线,所以选取了SAA7113作为视频解码芯片.文章简述了I2 C总线协议的数据传输时序,及模拟视频解码芯片SAA7113的基本功能、工作原理和相关寄存器的设置,给出基于FPGA的SAA7113初始化的方法,并且详细的概述了I2 C总线的各个模块,在寄存器配置中给出了相应的芯片初始化的状态转换图,最后用Quartus软件进行仿真,实验证明数据传输符合I2 C协议规定.结果证明可以正确的配置芯片,进行视频数据的采集

Abstract:: The purpose is to study the I2C bus,it has the interface cable and control simple devices are packaged in small,higher commu-nication speed,etc,so select the SAA7113 as video decoder chip. It gives a brief account of the data transmission timing of the I2C bus protocol,the basic functions of the analog video decoding chip SAA7113 works and associated register set,and presents a SAA7113 ini-tialization approach based on FPGA,overviews each module of the I2C bus in detail,and is given in the register configuration of the chip initialization state transition diagram,finally use the Quartus software for simulation,the experiments show that data transmission complies with the provisions of the I2C protocol. The results show that correctly configure the chip,and have video data collection