[1]刘承禹,田泽,赵强,等.多总线接口信号处理SoC虚拟验证平台的实现[J].计算机技术与发展,2014,24(10):51-54.
　LIU Cheng-yu,TIAN Ze,ZHAOQiang,et al.Implementation of Virtual Verification Platform for Multibus Interface Signal Processing SoC[J].,2014,24(10):51-54.
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多总线接口信号处理SoC虚拟验证平台的实现()

《计算机技术与发展》[ISSN:1006-6977/CN:61-1281/TN]

卷:
24
期数:
2014年10期
页码:
51-54
栏目:
智能、算法、系统工程
出版日期:
2014-10-10

文章信息/Info

Title:
Implementation of Virtual Verification Platform for Multibus Interface Signal Processing SoC
文章编号:
1673-629X（2014）10-0051-04
作者:
 刘承禹; 田泽; 赵强; 廖寅龙
 中国航空计算技术研究所
Author(s):
 LIU Cheng-yu; TIAN Ze ; ZHAOQiang; LIAO Yin-long
关键词:
 ; SoC; 验证; 验证平台
Keywords:
 ; System on Chip; verification; verification platform
分类号:
TP39
文献标志码:
A
摘要:
 多总线接口信号处理SoC芯片是以信号处理DSP为核心集成了多个总线接口的片上系统，该SoC涉及的总线协议众多，验证复杂、工作量大，验证将是该SoC芯片开发的瓶颈。为了缩短多总线接口信号处理SoC芯片的开发周期，提高该SoC芯片的一次流片成功率，必须采用更为可靠和有效的验证方案。以SoC验证流程及方法为指导，重点介绍了多总线接口信号处理SoC虚拟验证平台的构建和具体实施。验证结果表明，该验证平台能高效、全面验证芯片功能，提高了芯片验证效率，缩短了整个芯片开发周期，为芯片的成功投片提供了可靠保障。
Abstract:
 Multibus interface signal processing SoC chip is a system on chip with DSP as the core integrating more bus interface. This SoC refers various bus protocol,being complex verification,and have much workload,verification will be the bottleneck of this SoC chip de-velopment. To shorten the development period of multibus interface signal processing SoC chip and increase the success rate of this SoC chip tape-out,must use more credible and effective verification scheme. Taking SoC verification procedure and method as the guidance, focus on the construction and implementation of virtual verification platform for multibus interface signal processing SoC. The verification result indicates this verification platform can efficiently and fully validate the logical function of the SoC chip,improving chip verification efficiency,shortening the whole chip development period,and provide credible guarantee for taping out successfully.

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更新日期/Last Update: 2015-04-02