高速A／D与微处理器间的数据缓存技术-《计算机技术与发展》

文章信息/Info

Title:: Technology of Data Buffer Between High - Speed ADC and Microprocessor

Author(s):: DU Ling-yun; HUANG Shi-tan; Xi＇ an Microelectronics Technology Institute

Keywords:: high- speed data acquisition system; A/D converter（ADC） ; sampling rate; microprocessor; data buffer; interleaved

摘要:: 由于数字信号处理的种种优点，现在多数时候是将模拟信号转换成数字信号再进行处理。在雷达系统中往往产生高频信号，要对这类信号进行数字处理，根据恩奎斯特采样定律，要求A／D采样率高达Gsps量级。对此例高频信号进行采样的系统，就是所谓的高速数据采集系统。高速数据采集具有系统数据吞吐率高的特点，要求系统在短时间内能够传输并存储采集结果。模数转换后的数据快速存储能力在一定程度上制约着A／D转换的频率和最大采集时间。故高速数据采集系统中的数据存储是一个热点和难点。文中研究讨论了一种高达IGsps的A／D与微处理器间的

Abstract:: Generally convert analog signals into digital signals for the advantages of the digital signals processing. The signals in the radar system has high frequency. So need the ADC that has the sampling rate of Gsps grade to sample the radar signals according to the Nyquist law. The sampling system that sample this high frequency signals is a high- speed data acquisition system. The high - speed data acquisition system that has a high data throughput demands quick data transmission and storage. The A/D converter＇s frequency and continous sampling time is limited by the ability of the data transmission and storage. The technology, of data buffer between high - speed ADC and microprocessor is important and difficult. This paper proposes the technology of data buffer between high - speed ADC and microprocessor that has 1Gsps grade sampling rate